How do you force a makefile to rebuild a target

I have a makefile that builds and then calls another makefile. Since this makefile calls more makefiles that does the work it doesnt really change. Thus it keeps thinking the project is built and upto date.

dnetdev11 ~ # make
make: `release' is up to date.

How do i force the makefile to rebuild the target?

clean = $(MAKE) -f ~/xxx/xxx_compile.workspace.mak clean

build = svn up ~/xxx                                                       \
        $(clean)                                                                \
        ~/cbp2mak/cbp2mak -C ~/xxx ~/xxx/xxx_compile.workspace        \
        $(MAKE) -f ~/xxx/xxx_compile.workspace.mak $(1)                    \

        $(build )

        $(build DEBUG=1)


        cp ~/xxx/source/xxx_utility/release/xxx_util /usr/local/bin
        cp ~/xxx/source/xxx_utility/release/ /usr/local/lib

Note: Names removed to protect the innocent

Edit: Final Fixed version:

clean = $(MAKE) -f xxx_compile.workspace.mak clean;

build = svn up;                                         \
        $(clean)                                        \
        ./cbp2mak/cbp2mak -C . xxx_compile.workspace;   \
        $(MAKE) -f xxx_compile.workspace.mak    $(1);   \

.PHONY: release debug clean install

        $(call build,)

        $(call build,DEBUG=1)


        cp ./source/xxx_utillity/release/xxx_util /usr/bin
        cp ./dlls/Release/ /usr/lib

You could declare one or more of your targets to be phony.

A phony target is one that is not really the name of a file; rather it is just a name for a recipe to be executed when you make an explicit request. There are two reasons to use a phony target: to avoid a conflict with a file of the same name, and to improve performance.


A phony target should not be a prerequisite of a real target file; if it is, its recipe will be run every time make goes to update that file. As long as a phony target is never a prerequisite of a real target, the phony target recipe will be executed only when the phony target is a specified goal

How to force make to always rebuild a file, Force Targets (GNU make) If a rule has no prerequisites or recipe, and the target of the rule is a PHONY '; thus ' FORCE ' appears in many makefiles. This will force it to resolve the commands under the Makefile.uptodate target before starting the build of yourMainTarget or any of its dependencies, which allows the clean to finish before e.g. compiling anything or running anything.

The -B switch to make, whose long form is --always-make, tells make to disregard timestamps and make the specified targets. This may defeat the purpose of using make, but it may be what you need.

Force Targets (GNU make), A phony target is one that is not really the name of a file; rather it is just a name In this situation the makefile will often contain a variable which lists a number of� A phony target is one that is not really the name of a file; rather it is just a name for a recipe to be executed when you make an explicit request. There are two reasons to use a phony target: to avoid a conflict with a file of the same name, and to improve performance.

One trick that used to be documented in a Sun manual for make is to use a (non-existent) target '.FORCE'. You could do this by creating a file,, that contains:


Then, assuming your existing makefile is called makefile, you could run:

make FORCE_DEPS=release -f -f makefile release

Since .FORCE does not exist, anything that depends on it will be out of date and rebuilt.

All this will work with any version of make; on Linux, you have GNU Make and can therefore use the .PHONY target as discussed.

It is also worth considering why make considers release to be up to date. This could be because you have a touch release command in amongst the commands executed; it could be because there is a file or directory called 'release' that exists and has no dependencies and so is up to date. Then there's the actual reason...

Phony Targets (GNU make), If a target is older than it's dependencies then it will be considered "out of date" and will be rebuilt. Your problem is that your target has no� Here the target ‘FORCE’ satisfies the special conditions, so the target clean that depends on it is forced to run its recipe. There is nothing special about the name ‘FORCE’, but that is one name commonly used this way. As you can see, using ‘FORCE’ this way has the same results as using ‘.PHONY: clean’.

Someone else suggested .PHONY which is definitely correct. .PHONY should be used for any rule for which a date comparison between the input and the output is invalid. Since you don't have any targets of the form output: input you should use .PHONY for ALL of them!

All that said, you probably should define some variables at the top of your makefile for the various filenames, and define real make rules that have both input and output sections so you can use the benefits of make, namely that you'll only actually compile things that are necessary to copmile!

Edit: added example. Untested, but this is how you do .PHONY

.PHONY: clean    

When do makefiles recompile and when don't they? (How to force , TL;DR: GNU Make decides whether to rebuild a 'target' file based on the contents of the files changing, thus forcing an unnecessary rebuild. c++,makefile. You're not including your dependency files correctly. The wildcard there doesn't do what you want. It'd be simpler to just: DEPS = $(OBJS:.o=.d) -include $(DEPS) To actually wildcard the dependencies, you'd have to do: -include $(wildcard *.d) Note that gcc actually lets you generate the dependency and the object files

This simple technique will allow the makefile to function normally when forcing is not desired. Create a new target called force at the end of your makefile. The force target will touch a file that your default target depends on. In the example below, I have added touch myprogram.cpp. I also added a recursive call to make. This will cause the default target to get made every time you type make force.

yourProgram: yourProgram.cpp
       g++ -o yourProgram yourProgram.cpp 

       touch yourProgram.cpp

Rebuilding Makefile Targets Only When , dnetdev11 ~ # make make: `release' is up to date. How do i force the makefile to rebuild the target? clean = $(MAKE) -f ~/xxx/xxx_compile.workspace.mak clean� A consequence of this is that you can force a rebuild by deleting the target, or by 'touching' the dependent to make it later than the target. You can avoid a rebuild by 'touching' the target. Touching simply updates the timestamp to now.

linux - How do you force a makefile to rebuild a target, I've written this makefile: PATHS := ${shell echo */ | grep -v "*/"} OBJ :=� If you want to emulate rake's behavior, where you provide descriptions for each target, there is a simple technique for doing this: embed descriptions in comments for each target you want listed. You can either put the description next to the target or, as I often do, next to a PHONY specification above the target, like this:

How do you force a target to be always ran? (GNU Make), If make finds a makefile , it begins the dependency check with the first target Since it rebuilt at least one of the dependencies for batch, make assumes that You can use a dependency with a null rule to force the target rule to be executed. The makefile describes the relationship between targets and prerequisites, and also specifies the commands needed to bring the target up-to-date when one or more of the prerequisites has changed. The only way that make determines "out of date-ness" is by comparing the modification time of target files and their prerequisites.

Dependency Checking: make vs. Shell Scripts, You should try: force: make -B show That should invoke the show target with the flag and make everything rebuild itself appropriately. [ Original Answer ] You either declare that target to be .phony, or you pass the flag -B (which I believe should be shorthand for --always-make). This should have (gnu) make disregard all the timestamps and make

  • Lodle, since this is a frequently visited question, would you like to edit the question to be more modern? (It looks like .PHONY was not your only problem, and you're not really supposed to edit the solution into the question, or at least not anymore.)
  • This answer, while it is "accepted" and highly "upvoted" is really off-the-mark. First, it says "declare targets to be phony" but then it says "phony target is not really the name of a file". Well, if your target is a file, that is then a contradiction in the answer. Second, it says "phony target should not be a prerequisite of a real" - well, what if it is? The original question, did not specify if it is or it is not. The correct answer, is, not to declare your targets to be phony, but rather, declare an additional phony target, and then, depend the targets you want rebuilt, on that.
  • @MarkGaleck. When the answer states that "A phony target is one that is not really the name of a file" it is quoting directly from the gcc make manual. It is perfectly correct.
  • "Target" is a Make term that refers to the text to the left of a colon :, not just the end result that you want created (e.g. your binary file). In the question, release, debug, clean, and install are the Make targets, not xxx_util or or anything else.
  • @MarkKCowan I completely agree! This options is exactly what I was looking for, not some workaround hack as Dave suggests.
  • The caveat with this approach is , that it just builds tooo many things. Specifically with autotools, I saw it rerunning configure .. I wish a LD_PRELOAD based solution can be build !!
  • yes, and it can even rewrite files you didn't want to! such as global system libraries that appear in the dependencies and get rebuilt and overwritten...
  • CAVEAT: This will do what it says (LOL): rebuild your target from scratch ignoring all timesamps. So if you just want to rebuild the very last step of a long chain (e.g., for testing a new part of a workflow), then a temporary .PHONY might be more practical.
  • Well if you could show me an example it would be nice. Atm im just hacking it up trying to get the dam thing to work :P
  • The location of the .PHONY target does not matter. It can be anywhere in the Makefile.
  • You should never use make inside a Makefile. Use $(MAKE) instead.
  • In recipe for new better use $(MAKE) than make
  • Did not answer question: tangent to main point and should be a comment not an answer.
  • Maybe I wasn't clear enough. With makepp this whole wrapper makefile is not needed. By knowing the exact dependencies (all of them, not just what's listed after the :) it will always rebuild when necessary.