What are IN & OUT instructions in x86 used for?

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I've encoutered these to instructions IN & OUT while reading "Understanding Linux Kernel" book. I've looked up reference manual.

5.1.9 I/O Instructions

These instructions move data between the processor’s I/O ports and a register or memory.

IN    Read from a port
OUT   Write to a port
INS/INSB  Input string from port/Input byte string from port 
INS/INSW  Input string from port/Input word string from port 
INS/INSD  Input string from port/Input doubleword string from port
OUTS/OUTSB    Output string to port/Output byte string to port 
OUTS/OUTSW    Output string to port/Output word string to port 
OUTS/OUTSD    Output string to port/Output doubleword string to port

I didn't get few things:

  1. "processor’s I/O ports". What are they? Why would we want to read & write "strings" to & from these ports?
  2. I never encoutered a scenerio where I need to use these instructions. When would I be needing these?
  3. Give some practical examples.

You know how memory addressing works? There's an address bus, a data bus, and some control lines. The CPU puts the address of a byte (or a beginning byte) of memory on the address bus, then raises the READ signal, and some RAM chip hopefully returns the contents of memory at that address by raising or lowering individual lines (corresponding to bits in the byte(s)) on the data bus. This works for both RAM and ROM.

But then there are also I/O devices: Serial and parallel ports, the driver for a PC's tiny internal speaker, disk controllers, sound chips and so on. And those devices also get read from and written to. They also need to be addressed so the CPU accesses the correct device and (usually) the correct data location within a given device.

For some CPU models including the xxx86 series as found in most "modern" PCs, I/O devices share the address space with memory. Both RAM/ROM and IO devices are connected to the same address, data and control lines. For example, the serial port for COM1 is addressed starting at (hex) 03F8. But there's almost certainly memory at the same address.

Here's a really simple diagram:

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Clearly the CPU needs to talk to either memory or the I/O device, never both. To distinguish between the two, one of the control lines called "M/#IO" asserts whether the CPU wants to talk to memory (line=high) or an I/O device (line=low).

The IN instruction reads from an I/O device, OUT writes. When you use the IN or OUT instructions, the M/#IO is not asserted (held low), so memory doesn't respond and the I/O chip does. For the memory-oriented instructions, M/#IO is asserted so CPU talks to the RAM, and IO devices stay out of the communication.

Under certain conditions the IO devices can drive the data lines and the RAM can read them at the same time. And vice versa. It's called DMA.

Traditionally, serial and printer ports, as well as keyboard, mouse, temperature sensors and so forth were I/O devices. Disks were sort of in between; data transfers would be initiated by I/O commands but the disk controller would usually direct-deposit its data in system memory.

In modern operating systems like Windows or Linux, access to I/O ports is hidden away from "normal" user programs, and there are layers of software, privileged instructions and drivers to deal with the hardware. So in this century, most programmers don't deal with those instructions.

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Start with something like this:

http://www.cpu-world.com/info/Pinouts/8088.html

You are learning instructions for a very old technology chip/architecture. Back when everything but the processor core was off chip. See the address lines and the data lines and there is a RD read line and WR write line and IO/M line?

There were two types of instructions memory based and I/O based because there were addressable spaces, easily decoded by the IO/M IO or Memory.

Remember you had 74LSxx glue logic, lots of wires and lots of chips to connect a memory to the processor. And memory was just that memory, big expensive chips. If you had a peripheral that needed do do anything useful you also had control registers, the memory might be pixel data, but somewhere you needed to set the horizontal and vertical scan clocks limits, these might be individual 74LSxx latches, NOT memories, having I/O mapped I/O saved on both glue logic and just made a lot of sense from a programmer perspective it also avoided changing your segment registers to aim your 64K memory window around, etc. Memory address space was a sacred resource, esp when you wanted to limit your address decoding to a few bits because every few bits cost you a number of chips and wires.

Like big and little endian memory mapped I/O vs I/O mapped I/O was a religious war. And some of the responses you are going to see to your question are going to reflect the strong opinions that are still around today in the folks that lived it. The reality is that every chip on the market today has multiple busess for various things, you dont hang your real time clock off of the ddr memory bus with an address decoder. Some still even have completely separate instruction and data busses. In a sense Intel won the war for the concept of separate address spaces for different classes of things even though the term I/O port is evil and bad and should not be uttered for say 20-30 more years. You need folks my age that lived it to be retired or gone before the war is truly over. Even the term memory mapped I/O is a thing of the past.

That is really all it ever was, a single address decode bit on the outside of the intel chip that was controlled by the use of specific instructions. Use one set of instructions the bit was on use one set of instructions the bit was off. Want to see something interesting go look at the instruction set for the xmos xcore processors they have lots of things that are instructions instead of memory mapped registers, it takes this I/O mapped I/O thing to a whole new level.

Where it was used is as I described above, you would put things that made sense and you could afford to burn memory address space for like video pixels, network packet memory (maybe), sound card memory (well not that either but you could have), etc. And the control registers, address space relative to the data was very small, maybe only a few registers, were decoded and used in I/O space. the obvious ones are/were serial ports and parallel ports who had little if any storage, you might have had a small fifo on the serial port if anything.

Because address space was scarce it was not uncommon and is still seen today to have memory hidden behind two registers an address register and a data register, this memory is only available through these two registers, it is not memory mapped. so you write the offset into this hidden memory in the address register and you read or write the data register to access the content of the memory. Now because intel had the rep instruction and you could combine it with insb/w outsb/w the hardware decoder would (if you had nice/friendly hardware folks working with you) autoincrement the address whenever you did an I/O cycle. So you could write the starting address in the address register and do a rep outsw and without burning fetch and decode clock cycles in the processor and on the memory bus you could move data pretty fast into or out of the peripheral. This kind of thing is now considered a design flaw thanks to the modern super scalar processors with fetches based on branch prediction, your hardware can experience reads at any time that have nothing to do with executing code, as a result you should NEVER auto increment an address or clear bits in a status register or modify anything as a result of a read to an address. (Editor's note: actually you just make sure your I/O registers with side-effects for read are in uncacheable memory regions/pages. Speculative prefetch of uncacheable memory isn't allowed in the x86 ISA. And can't ever happen for I/O space accesses. But in/out are very slow and partially serializing, and physical memory address space is no longer scarce, so device memory is normally just memory-mapped for efficient access with full-size PCIe transactions.)

The protection mechanisms built into the 386 and on to the present actually make it very easy to access I/O from user space. Depending on what you do for a living, what your company produces, etc. You can most definitely use the in and out family of instructions from user space (application programs in windows and linux, etc) or kernel/driver space, it is your choice. You can also do fun things like take advantage of the virtual machine and use I/O instructions to talk to drivers, but that would probably piss off folks in both the windows and linux worlds, that driver/app wouldnt make it very far. The other posters are correct in that you are likely never going to need to use these instructions unless you are writing drivers, and you are likely never going to write drivers for devices using I/O mapped I/O because you know...the drivers for those legacy devices have already been written. Modern designs most definitely have I/O but it is all memory mapped (from a programmers perspective) and uses memory instructions not I/O instructions. Now the others side if this is DOS is definitely not dead, depending on where you you may be building voting machines or gas pumps or cash registers or a long list of DOS based equipment. In fact if you work somewhere that builds PCs or PC based peripherals or motherboards, DOS based tools are still widely used for testing and for distributing BIOS updates and other similar things. I still run into situations where I have to take code from a current dos test program to write a linux driver. Just like not everyone that can throw or catch a football plays in the NFL, percentage wise very few do software work that involves this kind of stuff. So it is still safe to say these instructions you found are likely not going to be more to you than a history lesson.

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At the hardware level, most microprocessors have little or no I/O capability built in. A few processors have one or more pins that may be turned on and off using special instructions, and/or one or more pins that may be tested using special branch instructions, but such features are rare. Instead, I/O is usually handled by wiring the system so that accesses to a range of memory addresses will trigger some effect, or by including "in" and "out" instructions which behave like memory load/store operations except that a special signal is output saying "This is an I/O operation instead of a memory operation." In the days of 16-bit processors, there used to be some real advantages to having specialized in/out instructions. Nowadays such advantages are largely moot since one could simply allocate a big chunk of one's address space to I/O and still have plenty left for memory.

Since a program could wreak considerable havoc on a system by inappropriately performing I/O instructions (e.g. such instructions could perform arbitrary disk accesses), all modern operating systems forbid the use of such instructions in user-level code. Some systems may allow such instructions to be virtualized; if user code tries to write to I/O ports 0x3D4 and 0x3D5, for example, an operating system might interpret that as an attempt to set some video-control control registers to move the blinking cursor. Each time the user program performed the OUT instruction, the operating system would take over, see what the user program was trying to do, and act appropriately.

In the vast majority of cases, even if the operating system would translate an IN or OUT instruction into something suitable, it would be more efficient to request the appropriate action from the operating system directly.

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There is a bit more trickery to it than that. It doesn't just multiplex a separate address space of 64kb onto the same wires with an 'extra address bus/chip select pin'. Intel 8086 and 8088 and their clones also multiplex the data bus and address bus; all very uncommon stuff in CPUs. The datasheets are full of 'minimum/maximum' configuration stuff and all the latch registers you need to hook up to it to make it behave 'normally'. On the other hand, it saves a load of and gates and 'or' gates in address decoding and 64kb should be 'enough i/o ports for everyone' :P.

Also, for all those 'driver developer only' people, take note: besides people using Intel compatible chips in other hardware than just PCs (they were never really intended for use in the IBM PC in the first place - IBM just took them because they were cheap and already on the market), Intel also sells microcontrollers with the same instruction set (Intel Quark) and there are plenty of 'systems on a chip' by other suppliers with the same instruction set as well. I don't think you'll manage to cram anything with separate 'user space' 'kernel' and 'drivers' into 32kb :). For most things such complex 'operating systems' are neither optimal nor desired. Forming some UDP packets in RAM and then putting them into some ring buffer and making some relays go click click does not require a 30mb kernel and 10 second load time, you know. It's basically the best choice in case a PIC microcontroller isn't just quite enough but you don't want a whole industrial PC. So the port I/O instructions do get used a lot and not just by 'driver developers' for larger operating systems.

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Comments
  • Can you reccomend a book where i can read more about this ? your answer is great thank you !
  • I think I mostly learned this stuff in a computer architecture course at my university, about 30 years ago; so I can't cite a book I got this stuff from, sorry! However, Googling for some relevant keywords, I found many of them on one page in one book: amazon.com/… I can't tell you anything about the book except that it's from 1995 and I couldn't see myself paying $149 for it. Your mileage may vary, of course.
  • Well done. Thanks for this explanation. I have long been confused by the notion of IO space as I was taught strictly with MMIO. The fact that memory and IO can be thought of as addressable unto themselves leaves me a bit embarrassed for having not understood this sooner.
  • I understand how MMIO works. Perhaps most simply, an address is decoded such that the target hardware is enabled (by the address bits). How is an IO address decoded? I suspect it would be much in the same way. What, then, was the purpose of the IO memory space? Is it simply the other way of doing things or are there benefits over MMIO?
  • This answer might be accurate for an 8086 PC/AT or something, I don't know. But failing to mention MMIO seems like an oversight. Also, "share the address space with memory" is the opposite of the point you're making: I/O space and memory space are different address spaces, but access to them happened to share a physical bus. I'm not going to attempt an edit because I'd want to rewrite most of this :/
  • But if you tell the young people that nowadays, they'll never believe you... :-)
  • I didn't downvote, but, extensive though your answer is, I don't see it answering the original question!
  • @CarlSmotricz thanks for feedback. "I don't see it answering the original question!" Haven't I answered the OPs "What are IN & OUT instructions in x86 used for? 2) I never encoutered a scenerio where I need to use these instructions. When would I be needing these? 3) Give some practical examples." quite directly?
  • You gave an exhaustive answer to (3) but only a brief nod to (2) and none at all to (1). Also, your practical examples look a bit like voodoo without the explanation of how the instructions actually work at the hardware level. Please note, I really really don't care and I like the fact that your answer gives some supplementary information. Also, I'm one of your "competing" answer givers, so maybe I shouldn't be criticizing yours. I only commented because I saw your "please explain" question and felt you could use an honest (guessed) answer. Of course people may have had other reasons too.
  • @CarlSmotricz your feedback is more than welcome Carl.
  • If you're writing drivers they can certainly be used.
  • @Downvoter: so why don't you tell people what the problem is?
  • @Downvoter: BTW, I answered before he said anything about Linux.
  • if you are writing a non-test linux device driver, you should not use those instructions directly if possible, but instead c functions furnished by the linux kernel such as insb or outsb (clearly influenced by the x86 architecture) to make your code more architecture portable. Those functions however are implemented with assembly instructions for each architecture.
  • Worth adding that even device drivers do not use these instructions. These instructions are legacy, and modern devices use memory mapped I/O with PCIe bus or are built on top of USB.