What's the equivalent of rdtsc opcode for PPC?

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I have an assembly program that has the following code. This code compiles fine for a intel processor. But, when I use a PPC (cross)compiler, I get an error that the opcode is not recognized. I am trying to find if there is an equivalent opcode for PPC architecture.

.file   "assembly.s"
.text
.globl func64
.type   func64,@function
func64:
    rdtsc
    ret

.size   func64,.Lfe1-func64
.globl func
.type   func,@function
func:
    rdtsc
    ret

PowerPC includes a "time base" register which is incremented regularly (although perhaps not at each clock -- it depends on the actual hardware and the operating system). The TB register is a 64-bit value, read as two 32-bit halves with mftb (low half) and mftbu (high half). The four least significant bits of TB are somewhat unreliable (they increment monotonically, but not necessarily with a fixed rate).

Some of the older PowerPC processors do not have the TB register (but the OS might emulate it, probably with questionable accuracy); however, the 603e already has it, so it is a fair bet that most if not all PowerPC systems actually in production have it. There is also an "aternate time base register".

For details, see the Power ISA specification, available from the power.org Web site. At the time of writing that answer, the current version was 2.06B, and the TB register and opcodes were documented at pages 703 to 706.

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When you need a 64-bit value on a 32-bit architecture (not sure how it works on 64-bit) and you read the TB register you can run into the problem of the lower half going from 0xffffffff to 0 - granted this doesn't happen often but you can be sure it will happen when it will do the most damage ;)

I recommend you read the upper half first, then the lower and finally the upper again. Compare the two uppers and if they are equal, no problemo. If they differ (the first should be one less than the last) you have to look at the lower to see which upper it should be paired with: if its highest bit is set it should be paired with the first, otherwise with the last.

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Inspired by a comment from Peter Cordes and the disassembly of clang's __builtin_readcyclecounter:

mfspr 3, 268
blr

For gcc you can do the following:

unsigned long long rdtsc(){
        unsigned long long rval;
        __asm__ __volatile__("mfspr %%r3, 268": "=r" (rval));
        return rval;
}

Or For clang:

unsigned long long readTSC() {
    // _mm_lfence();  // optionally wait for earlier insns to retire before reading the clock
    return __builtin_readcyclecounter();
}

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